Digital Verification Engineer

What you will do

• Contribute to the design of complex SoCs for different applications like communication, automotive, high performing computing, health, AI. 
• Block and top level verification using the state of the art methodologies and tools. 
• Collaborate with digital design team for debugging and quality improvement. 
• Collaborate in an inter-disciplinary team. Understand (internal or external) customer needs, challenges and requirements and translate that into solutions that you can incorporate into your designs. 
• Contribute to high-quality reports and documentation. 

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits. 

Who you are

• MSc or PhD in electronics engineering with 5+ years of relevant experience. 
• Strong experience with digital circuit verification in SystemVerilog/UVM. 
• Experience with designing CPU and peripheral (sub-)systems. 
• Experience with verification plan definition, verification methodologies, code/functional coverage, constrained random verification, verification plan execution and tracking. 
• Experience with formal verification is a plus. 
• Understanding of the remaining steps of the digital ASIC-design flow is required: logic synthesis, timing analysis, power simulation, logic equivalence, DFT and/or P&R. 
• Knowledge of FPGA-development is a plus. 
• Knowledge of low-power designs is a plus. 
• Experience with Cadence IC design tools is a plus. 
• Experience with scripting languages like TCL and Python is required. 
• Experience with revisioning systems, like git is required. 
• Structural way of working and ability to develop and manage activity planning is highly preferred. 
• Previous experience working closely with (internal or external) stakeholders is a plus. 
• Able to take initiative and responsibility for team’s success. Thinking pro-actively, working independently and having a creative problem-solving attitude are attributes that define yourself. 
• Have broad interest across disciplines and like to embrace new challenges. 
• Excellent communication skills in English (written and spoken).