YOUR FUTURE RESPONSIBILITIES
- Creating inteligent data convertor IPs towards the automation of the design flow and design portability of analog/mixed-signal (MS) circuits
- Working within analog generator framework at the crossroad between automation, programmatic IC design and AI towards system and circuit data convertor solutions
- System behavioral modeling to validate different ADC architectures
- Transistor-level feasibility studies for various ADC blocks with a focus on high speed TI-SAR ADC
- Coding in Python TI-SAR ADC system/circuit level design methodology or/and floorplan
- Drive layout and top-level simulations to validate top-level integration
- Defining test-plans on subblock, block and system level
- Taking lab measurements to validate analog designs
- Supervision of Junior Scientist
- Publication of the results at conferences or in scientific journals
YOUR PROFILE
- Strong skills in designing various analog blocks, including bandgap reference, voltage and current bias, op-amp, regulator, oscillator and switched-cap circuits
- IC design automation experience
- In-depth knowledge of low noise and low power design techniques
- ADC architectures knowledge
- Experience of designing Successive Approximation (SAR) and/ or Delta Sigma ADCs
- Experience of layout floor-planning and ESD protection
- Python knowledge
- Linux knowledge is a plus
- Team player, self motivated and goal oriented
- Master‘s degree in relevant field with 5+ years of experience in related area of expertise or PhD with 3 years of experience
IMPORTANT FACTS ABOUT SAL
- Start of your employment: as soon as possible.
- This position is endowed with a gross annual salary of € 51.800.- based on the collective agreement for research („Forschungs-Kollektivvertrag“) excluding bonus and depending on your experience and skills.
- Home Office possible.
- € 4.- /day food allowance in restaurants / € 2.- /day in supermarkets.
- Family- & Kids friendly.
- Free Coffee/Milk/Tee.
BECOME PART OF SILICON AUSTRIA LABS
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